General Information
Job Title Staff RTL Design Engineer Job ID 11915 Country India City Bangalore Date Posted 24-Jun-2025 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote Eligible NoDescriptions & Requirements
Job Description and RequirementsWe Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are an experienced ASIC Digital Design professional with a passion for building state-of-the-art silicon solutions. You thrive in a collaborative, global environment and are motivated by the opportunity to tackle complex technical challenges. Your deep expertise in RTL design, synthesis, and industry protocols is matched by your curiosity and commitment to continual learning. You are adept at translating functional requirements into robust, scalable architectures and have a proven track record of delivering high-quality, synthesizable cores. You are comfortable working both independently as a technical individual contributor and as a mentor or technical lead within a diverse team.
With strong communication skills, you excel at collaborating with cross-functional teams and customers, ensuring clarity and alignment throughout the design process. You value teamwork and are known for your initiative, problem-solving abilities, and attention to detail. Your approach is inclusive and adaptable, welcoming diverse perspectives to drive innovation. You are eager to contribute to groundbreaking products that make a tangible difference in the world, and you embrace opportunities for professional growth within a supportive and dynamic organization.
What You’ll Be Doing:
- Architecting and implementing advanced RTL designs for next-generation high-performance DDR PHY and related IP cores.
- Analyzing and interpreting standard and functional specifications to create detailed architecture and micro-architecture documentation for medium to high complexity features.
- Executing hands-on RTL coding, synthesis, CDC analysis, and debug, ensuring robust and efficient designs.
- Developing and executing comprehensive test plans to validate functional correctness and performance.
- Collaborating with global teams and interacting with customers to understand and refine specification requirements.
- Mentoring junior engineers, providing technical guidance, and potentially leading small project teams to drive successful project outcomes.
- Continuously improving design flows and methodologies by leveraging feedback and industry best practices.
The Impact You Will Have:
- Advance the performance and reliability of industry-leading IP cores, directly contributing to Synopsys' reputation for technical excellence.
- Enable customers to deliver cutting-edge products by providing robust, high-quality digital design solutions.
- Drive innovation in the development of next-generation memory and interface technologies.
- Foster a culture of technical mentorship and knowledge sharing within a global engineering team.
- Strengthen Synopsys’ collaborative relationships with key industry partners and customers.
- Shape the future of silicon design through your technical contributions and leadership.
What You’ll Need:
- Bachelor’s or Master’s degree in EE, EC, VLSI, or related field, with5+ years of relevant industry experience.
- Strong hands-on experience in RTL design using Verilog/SystemVerilog for ASICs, including data path and control path architecture.
- Expertise in design trade-offs (area, latency, throughput) and familiarity with protocols such as DDR, PCIe, USB, or HBM.
- Proficiency with synthesis, CDC analysis, lint, static timing analysis, and formal verification flows.
- Experience in developing and interpreting functional specifications, and translating them into detailed design documents.
- Knowledge of scripting languages (Perl, Shell) for automation is a plus.
- Prior experience as a technical lead or mentor is highly desirable.
Who You Are:
- Innovative and detail-oriented, with a strong analytical mindset.
- Effective communicator who thrives in collaborative, cross-cultural environments.
- Proactive problem solver with a high degree of initiative and ownership.
- Team player who values diversity and inclusivity in thought and approach.
- Resilient, adaptable, and eager to continuously learn and grow.
- Strong leadership and mentoring skills, with a passion for developing others.
The Team You’ll Be A Part Of:
You will join the DesignWare IP Design R&D team at Synopsys’ Bengaluru Design Center—a diverse, high-performing group focused on developing world-class synthesizable cores. Our team collaborates closely with experts across global sites, leveraging collective knowledge to deliver innovative, high-impact solutions. We value open communication, continuous improvement, and fostering an environment where every voice is heard and respected.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.