- Develop and implement DFT strategies for mixed-signal ICs, considering factors such as fault coverage, test time, and in-system test
- Ensure compliance with IEEE standards (1149, 1687) for DFT methodologies and test patterns
- Conduct fault simulation and coverage analysis to assess the effectiveness of DFT strategies and identify areas for improvement
- Generate high-quality test patterns using automated test pattern generation (ATPG) tools
- Verify the correctness of DFT implementation through simulation and hardware testing
- Collaborate with design/implementation teams to ensure that DFT requirements are met throughout the process
- Bachelor's degree in Electrical Engineering or Computer Engineering
- 6+ years of experience in DFT for mixed-signal ICs
- Understanding of DFT concepts, including scan insertion, BIST, and boundary scan
- In-depth knowledge of DFT EDA tools (Siemens/Synopsys)
- Familiarity with IEEE standards 1149, 1500, and 1687
- Experience with fault simulation and coverage analysis tools
- Problem-solving and analytical skills
- Strong communication skills
- Experience of consistently working under your own initiative, seeking feedback and input where appropriate
- Proficiently use Siemens/Synopsys EDA tools for DFT-related tasks, including MBIST, scan insertion, and test pattern generation
- Master's degree in Electrical Engineering or Computer Engineering
- 10+ years of experience in DFT strategies implementation and development for mixed signal ICs
- Experience with mixed-signal DFT methodologies
- Knowledge of scripting languages (e.g., Perl, Python) for automation
- Experience with hardware testing and debugging
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