Sr Supervisor RTL Design

General Information

Descriptions & Requirements

Alternate Job Titles:

• RTL Design Supervisor
• Digital Design Team Lead
• High-Speed Protocols Supervisor
• ASIC Design Supervisor

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are highly collaborative, valuing knowledge sharing and contributing to a culture of continuous improvement. Your familiarity with protocols like USB enables you to quickly adapt to new projects and deliver impactful results. Your analytical mindset, exceptional debugging abilities, and drive to exceed quality metrics ensure the delivery of world-class solutions. Proficient in scripting languages such as Perl, TCL, and Python, you efficiently automate processes to enhance team productivity. Strong communication skills, a global perspective, and a proactive attitude enable you to work seamlessly with cross-functional and multi-site teams. Above all, you are a lifelong learner, embracing challenges, adapting to new technologies, and committed to shaping the future of silicon design.

What You’ll Be Doing:

• Leading and mentoring a team of RTL design engineers focused on high-speed protocols such as USB and other critical peripheral interfaces.
• Overseeing the full lifecycle of digital design, including specification, implementation, and verification of complex protocols and interfaces.
• Ensuring all digital designs adhere to industry standards and internal quality benchmarks.
• Collaborating closely with system architects and cross-functional engineering teams to define requirements and drive integration of IPs into advanced systems.
• Managing project timelines, resource allocation, and deliverables to ensure successful completion of milestones.
• Conducting comprehensive design reviews, providing technical guidance, and facilitating constructive feedback to enhance team performance.
• Staying informed on the latest technology trends, tools, and best practices in digital design and high-speed protocols.
• Fostering effective communication between engineering teams and key stakeholders to support project success.

The Impact You Will Have:

• Driving the successful development and integration of state-of-the-art digital designs for high-speed and peripheral protocols.
• Elevating the technical capabilities and professional growth of your engineering team through mentorship and leadership.
• Accelerating project delivery by streamlining design processes and optimizing resource utilization.
• Enhancing the reliability and performance of Synopsys’ IP solutions in complex system environments.
• Contributing to the advancement of industry standards and best practices in digital design methodology.
• Strengthening cross-functional collaboration, resulting in more robust and innovative product offerings.
• Ensuring that Synopsys remains at the forefront of technological innovation in the semiconductor industry.
• Building a culture of continuous improvement and excellence within your team.

What You’ll Need:

• Bachelor’s degree in Electronics Engineering, Computer Engineering, or related field (minimum 8 years relevant experience), or Master’s degree (minimum 6 years relevant experience).
• At least 3 years in a supervisory or leadership role within engineering teams.
• Advanced expertise in RTL design and digital design principles, especially for high-speed and peripheral protocols.
• Proficiency in hardware description languages such as Verilog and VHDL.
• Strong understanding of digital design methodologies and verification processes.
• Experience with IP development and integration for high-speed protocols (preferred).
• Familiarity with ASIC/FPGA design flows like CDC/Synthesis/UPF/STA and system-on-chip (SoC) design principles (preferred).
• Hands-on experience with protocols USB (preferred) but MIPI-I3C, UFS, AMBA, Ethernet, DDR, PCIe will also work.
• Proficiency in scripting languages like Perl, TCL, and Python for process automation.

Who You Are:

• Inspirational leader and mentor, able to nurture talent and drive team success.
• Excellent communicator, adept at bridging technical and non-technical teams.
• Highly organized with strong project management and problem-solving skills.
• Adaptable and resilient, thriving in fast-paced and evolving environments.
• Collaborative and inclusive, committed to fostering a diverse workplace culture.
• Detail-oriented, with a commitment to delivering high-quality results.
• Analytical thinker with exceptional debugging abilities and a drive to exceed quality metrics.
• Proactive and globally minded, able to work seamlessly across cross-functional and multi-site teams.
• Lifelong learner, embracing new challenges and technologies.

The Team You’ll Be A Part Of:

You’ll join a passionate and innovative team of RTL design engineers at Synopsys Bangalore, dedicated to developing cutting-edge digital solutions for high-speed protocols and peripheral interfaces. The team values collaboration, technical excellence, and continuous learning, working closely with system architects and cross-functional partners to deliver industry-leading IPs and system integrations.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.